A non-volatile memory cell includes a first select transistor, a first floating gate transistor, a second select transistor and a second floating gate transistor. The first select transistor is connected with a source line and a first program word line. The first floating gate transistor has a first floating gate. The first floating gate transistor is connected with the first select transistor and a first program bit line. The second select transistor is connected with the source line and a first read word line. The second floating gate transistor has a second floating gate. The second floating gate transistor is connected with the second select transistor and a first read bit line. The first floating gate and the second floating gate are connected with each other.