Invention Grant
- Patent Title: Method of making a semiconductor component having through-silicon vias
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Application No.: US16168306Application Date: 2018-10-23
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Publication No.: US10784162B2Publication Date: 2020-09-22
- Inventor: Chen-Hua Yu , Cheng-Hung Chang , Ebin Liao , Chia-Lin Yu , Hsiang-Yi Wang , Chun Hua Chang , Li-Hsien Huang , Darryl Kuo , Tsang-Jiuh Wu , Wen-Chih Chiou
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/48 ; H01L23/498 ; H01L21/02 ; H01L21/306 ; H01L21/3105 ; H01L21/321 ; H01L25/065 ; H01L25/11 ; H01L23/538 ; H01L25/04 ; H01L25/07 ; H01L25/075

Abstract:
A method of making a semiconductor component includes etching a substrate to define an opening. The method further includes depositing a first dielectric liner in the opening, wherein the first dielectric liner has a first stress. The method further includes depositing a second dielectric liner over the first dielectric liner, wherein the second dielectric liner has a second stress, and a direction of the first stress is opposite a direction of the second stress. The method further includes depositing a conductive material over the second dielectric liner.
Public/Granted literature
- US20190067107A1 METHOD OF MAKING A SEMICONDUCTOR COMPONENT HAVING THROUGH-SILICON VIAS Public/Granted day:2019-02-28
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