- Patent Title: Method of manufacturing semiconductor package using side molding
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Application No.: US16211421Application Date: 2018-12-06
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Publication No.: US10784228B2Publication Date: 2020-09-22
- Inventor: Do Hyung Kim , Sang Hoon An
- Applicant: LBSEMICON CO., LTD.
- Applicant Address: KR Gyeonggi-Do
- Assignee: LBSEMICON CO., LTD.
- Current Assignee: LBSEMICON CO., LTD.
- Current Assignee Address: KR Gyeonggi-Do
- Agency: Mayer & Williams PC
- Agent Stuart H. Mayer
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@46adbc26
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/56 ; H01L21/78 ; H01L21/304

Abstract:
Provided is a method of manufacturing a semiconductor package, the method including forming sawing grooves by sawing a wafer along individual chip boundaries in a downward direction from a top surface of the wafer by a thickness less than a wafer thickness, filling the sawing grooves with a molding material, forming a redistribution pattern, a passivation pattern, and an under bump metal (UBM) pattern on the wafer, bonding solder balls onto the UBM pattern, thinning the wafer based on a backgrinding process, and dividing the wafer into individual chips by sawing the molding material filled in the sawing grooves, in a downward direction.
Public/Granted literature
- US20190172814A1 METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE USING SIDE MOLDING Public/Granted day:2019-06-06
Information query
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