Wafer level package structures and packaging methods are provided. An exemplary method includes providing a device wafer having a first front surface and a first back surface opposing the first front surface, wherein at least one first chip is integrated in the first front surface; forming a first oxide layer on the first front surface of the device wafer; providing at least one second chip having a to-be-bonded surface; forming a second oxide layer on the to-be-bonded surface of each second chip; providing a carrier wafer; temporally bonding a surface of the second chip opposing the second oxide layer to the carrier wafer; forming an encapsulation layer on the carrier wafer between adjacent second chips of the at least one second; and bonding the device wafer and the second chip by bonding the first oxide layer with the second oxide layer by a low-temperature fusion bonding process.