A pixel array substrate including a substrate, a first signal line, a second signal line, a third signal line, a first active element and a conductive pattern is provided. The first signal line and the second signal line are disposed on the substrate and intersect with each other. The third signal line is disposed on the substrate and overlapped with the second signal line. The extending direction of the third signal line is parallel to the extending direction of the second signal line. The first active element is electrically connected to the first signal line. The first active element includes a semiconductor pattern, a first gate and a second gate. The semiconductor pattern is located between the first gate and the second gate. The first gate is overlapped with the second gate and connected to the third signal line. The second gate is connected to the first gate via the conductive pattern.