Invention Grant
- Patent Title: Isolation PIN diode structure
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Application No.: US16101938Application Date: 2018-08-13
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Publication No.: US10784382B2Publication Date: 2020-09-22
- Inventor: Ashok T. Ramu , Robert J. Bayruns , Michel Francois
- Applicant: DUET MICROELECTRONICS INC.
- Agency: John H. Choi & Associates
- Main IPC: H01L29/868
- IPC: H01L29/868 ; H01L29/40 ; H01L29/417 ; H01L29/06

Abstract:
A PIN diode has an anode spaced away from a central region of a top surface of a substrate, such that the anode is in a corner or at a side edge of the top surface. Alternatively, the PIN diode has an anode surrounded by a shield layer. The PIN diode reduces unwanted parasitic capacitance to increase the reverse isolation of RF switches and to reduce the diffusion capacitance to increase the f3dB frequency specification of amplifier circuits. The PIN diode dramatically reduces the values of both parasitic and diffusion capacitances, which enables its application in switches and amplifiers under a wide variety of bias conditions including reverse, low-moderate forward, and large forward-bias; which enables bonding to a much larger metal area than the active electrode, with negligible increase in the parasitic capacitance; and which enables reliable wire-bonding by presenting a highly planar metal surface.
Public/Granted literature
- US20190109242A1 ISOLATION PIN DIODE STRUCTURE Public/Granted day:2019-04-11
Information query
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