A slave module receives a first wake-up signal from an adjacent previous module to perform a wake-up operation and to transmit a second wake-up signal to an adjacent subsequent module. The slave module includes: an analog front end (AFE) including a first terminal and a second terminal, the AFE may be woken up by receiving the first wake-up signal through the first terminal and may output a first voltage through the second terminal in a woken up state; a processor including a third terminal electrically connected to the first terminal, a fourth terminal electrically connected to the second terminal, and a fifth terminal electrically connected to a second slave terminal. The processor may boot up when the first voltage is applied to the fourth terminal, may output a second voltage to the third terminal after being booted up, and may output the second wake-up signal to the fifth terminal.