In a first device incorporating a processor and a memory in communication with the processor, the memory includes executable instructions that, when executed, cause the processor to control the first device to perform functions of receiving a bit error pattern of data traffic transmission from the first device to a second device, the bit error pattern including a number and locations of bit errors which occurred during the data traffic transmission; and adapting at least one transmission parameter of the first device based on the received bit error pattern. The error pattern allows more refined data traffic decisions.