Invention Grant
- Patent Title: Interconnect structure and method of manufacturing the same
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Application No.: US15723099Application Date: 2017-10-02
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Publication No.: US10785865B2Publication Date: 2020-09-22
- Inventor: Jiun-Yi Wu , Chien-Hsun Lee , Chewn-Pu Jou , Fu-Lung Hsueh
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Maschoff Brennan
- Main IPC: H05K1/02
- IPC: H05K1/02 ; H01L21/48 ; H01L23/498 ; H01L23/552 ; H05K1/11 ; H05K3/00 ; H05K3/40 ; H05K3/42 ; H01L21/768
Abstract:
A method for manufacturing an interconnect structure is provided. The method includes the following steps. An opening is through a substrate. A low-k dielectric block is formed in the opening. At least one first via is formed through the low-k dielectric block. A first conductor is formed in the first via.
Public/Granted literature
- US20180027648A1 INTERCONNECT STRUCTURE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2018-01-25
Information query
