Invention Grant
- Patent Title: Wiring circuit substrate, semiconductor device, method of producing the wiring circuit substrate, and method of producing the semiconductor device
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Application No.: US15835637Application Date: 2017-12-08
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Publication No.: US10790209B2Publication Date: 2020-09-29
- Inventor: Koji Imayoshi
- Applicant: TOPPAN PRINTING CO., LTD.
- Applicant Address: JP Tokyo
- Assignee: TOPPAN PRINTING CO., LTD.
- Current Assignee: TOPPAN PRINTING CO., LTD.
- Current Assignee Address: JP Tokyo
- Agency: Foley & Lardner LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@50701706
- Main IPC: B32B3/00
- IPC: B32B3/00 ; H01L23/15 ; H01L23/498 ; H05K3/46 ; H05K3/40 ; H01L21/48 ; H05K1/11 ; H05K1/03 ; H05K1/09 ; H05K3/42

Abstract:
A wiring circuit substrate includes a glass base, insulating resin layers, wire groups, a first inorganic adhesive layer, a through electrode, and second conductive layers. The glass base has a through-hole. The insulating resin layers are laminated to the glass base and each have a conductive via formed therein. The wire groups are laminated to the insulating resin layers. The first inorganic adhesive layer is laminated to the inner surface of the through-hole. The through electrode is formed of a first conductive layer laminated to the first inorganic adhesive layer. The second conductive layers are formed on the through electrode and the glass base and electrically connected to the upper and lower ends of the through electrode. The glass base has a surface roughness Ra of 100 nm or less, and the second conductive layers each have an amount of dishing of 5 μm or less above the through electrode.
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