Provided herein may be a memory controller and an operating method thereof. The memory controller may include: a read fail control circuit configured to perform, when the read operation fails, an assist read operation of determining optimal read voltages to be used to read the selected memory cells, and determine whether a threshold voltage distribution of the selected memory cells is an abnormal distribution based on read-related information obtained by the read operation and the assist read operation; and an error correction code (ECC) engine configured to perform an ECC decoding operation on hard decision data obtained by reading the selected memory cells using the optimal read voltages based on whether the threshold voltage distribution of the selected memory cells is the abnormal distribution.