Invention Grant
- Patent Title: Method and system for pin layout
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Application No.: US16386838Application Date: 2019-04-17
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Publication No.: US10796060B2Publication Date: 2020-10-06
- Inventor: Fong-Yuan Chang , Li-Chun Tien , Shun-Li Chen , Ya-Chi Chou , Ting-Wei Chiang , Po-Hsiang Huang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, P.C., Intellectual Property Attorneys
- Agent Anthony King
- Main IPC: G06F30/394
- IPC: G06F30/394 ; G06F30/392 ; G06F30/398 ; G06F119/18

Abstract:
A computer readable storage medium encoded with program instructions, wherein, when the program instructions is executed by at least one processor, the at least one processor performs a method. The method includes selecting a cell, determining whether a pin has an area smaller than a predetermined area, allowing a pin access of the pin to extend in a corresponding patterning track of the pin access when the pin access when the pin is determined to be having an area smaller than the predetermined threshold, and causing an integrated circuit to be fabricated according to the pin.
Public/Granted literature
- US20190243940A1 METHOD AND SYSTEM FOR PIN LAYOUT Public/Granted day:2019-08-08
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