Invention Grant
- Patent Title: Stacked laminate inductors for high module volume utilization and performance-cost-size-processing-time tradeoff
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Application No.: US15208780Application Date: 2016-07-13
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Publication No.: US10796835B2Publication Date: 2020-10-06
- Inventor: Michael F. Zybura , George Maxim , Dirk Robert Walter Leipold , John August Orlowski , Baker Scott
- Applicant: Qorvo US, Inc.
- Applicant Address: US NC Greensboro
- Assignee: Qorvo US, Inc.
- Current Assignee: Qorvo US, Inc.
- Current Assignee Address: US NC Greensboro
- Agency: Withrow & Terranova, P.L.L.C.
- Main IPC: H01F27/30
- IPC: H01F27/30 ; H01F17/00 ; H01F27/29 ; H01L23/48 ; H01L23/498 ; H05K1/16

Abstract:
Embodiments of electronic devices, such as integrated circuit (IC) packages are disclosed. In one embodiment, an electronic device includes a first substrate and a second substrate. The first substrate has a first substrate body and a first inductor portion integrated into the first substrate body. Additionally, the second substrate comprises a second substrate body and a second inductor portion integrated into the second substrate body. The second substrate is mounted on the first substrate such that such that the second inductor portion is positioned over the first inductor portion and such that the second inductor portion is electrically connected to the first inductor portion so that the first inductor portion and the second inductor portion form a three dimensional (3D) inductor. By using two substrates, the 3D inductor can be increased in height while still allowing the substrates to be miniaturized and standardized for an IC package.
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