Invention Grant
- Patent Title: Methods for fabricating 3D semiconductor device packages, resulting packages and systems incorporating such packages
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Application No.: US16392221Application Date: 2019-04-23
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Publication No.: US10797018B2Publication Date: 2020-10-06
- Inventor: Eiichi Nakano
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H01L23/00 ; H01L25/065 ; H01L25/18 ; H01L25/00 ; H01L21/78 ; H01L21/683
Abstract:
Methods of forming semiconductor device packages comprising stacking multiple dice, the die stack exhibiting thin bond lines and having an outer environmental coating, the bond lines and environmental coating comprising an in situ formed compound. Semiconductor device packages so formed and electronic systems incorporating such packages are also disclosed.
Information query
IPC分类:
