Invention Grant
- Patent Title: Semiconductor device
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Application No.: US16200583Application Date: 2018-11-26
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Publication No.: US10797045B2Publication Date: 2020-10-06
- Inventor: Tatsuya Naito
- Applicant: FUJI ELECTRIC CO., LTD.
- Applicant Address: JP Kanagawa
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kanagawa
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@75e18aac com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@7150f31d
- Main IPC: H01L27/06
- IPC: H01L27/06 ; H01L21/324 ; H01L29/861 ; H01L29/06 ; H01L29/10 ; H01L29/40 ; H01L29/08 ; H01L29/66 ; H01L21/265 ; H01L21/266 ; H01L29/739 ; H01L27/07 ; H01L21/322 ; H01L29/12

Abstract:
An accumulation layer has a function of reducing an ON voltage (Von), which is a voltage between the collector and the emitter when turning on the IGBT, by accumulating carrier. However, when turning off the IGBT, the carrier contributes to a turn-off loss (Eoff). A semiconductor device is provided, comprising: a semiconductor substrate, wherein the semiconductor substrate includes: trench portions, a mesa portion each provided between two adjacent trench portions, and a drift layer, wherein the trench portions include: a gate trench portion, and a dummy trench portion, wherein the mesa portion has: an emitter region, a contact region, and a accumulation layer, wherein the number of accumulation layers provided in a depth direction in the mesa portion adjacent to the gate trench portion is larger than that of the accumulation layers provided in the depth direction in the mesa portion between the two dummy trench portions.
Public/Granted literature
- US20190109131A1 SEMICONDUCTOR DEVICE Public/Granted day:2019-04-11
Information query
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