Invention Grant
- Patent Title: Method for reducing Schottky barrier height and semiconductor device with reduced Schottky barrier height
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Application No.: US15964991Application Date: 2018-04-27
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Publication No.: US10797137B2Publication Date: 2020-10-06
- Inventor: Hung-Hsiang Cheng , Samuel C. Pan
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. , National Taiwan University
- Applicant Address: TW Hsinchu TW Taipei
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.,NATIONAL TAIWAN UNIVERSITY
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.,NATIONAL TAIWAN UNIVERSITY
- Current Assignee Address: TW Hsinchu TW Taipei
- Agency: McDermott Will & Emery LLP
- Main IPC: H01L29/47
- IPC: H01L29/47 ; H01L29/161 ; H01L29/872 ; H01L29/66 ; H01L21/285 ; H01L29/45 ; H01L21/324 ; H01L21/04 ; H01L29/16
Abstract:
A method for controlling Schottky barrier height in a semiconductor device includes forming an alloy layer including at least a first element and a second element on a first surface of a semiconductor substrate. The semiconductor substrate is a first element-based semiconductor substrate, and the first element and the second element are Group IV elements. A first thermal anneal of the alloy layer and the first element-based substrate is performed. The first thermal anneal causes the second element in the alloy layer to migrate towards a surface of the alloy layer. A Schottky contact layer is formed on the alloy layer after the first thermal anneal.
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