- Patent Title: Memory system including the semiconductor memory and a controller
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Application No.: US16563045Application Date: 2019-09-06
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Publication No.: US10803959B2Publication Date: 2020-10-13
- Inventor: Masanobu Shirakawa
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@898d475
- Main IPC: G11C16/06
- IPC: G11C16/06 ; G11C16/26 ; G11C11/56 ; H01L27/1157 ; G11C7/06 ; G11C16/34 ; H01L27/11582 ; G11C16/10 ; G11C7/10 ; G11C16/04

Abstract:
According to one embodiment, a memory system includes a semiconductor memory and a controller. The semiconductor memory includes first blocks including a memory cell capable of storing data of one bit, a second block including a memory cell capable of storing data of two or more bits. The semiconductor memory stores first data in a first latch circuit, and second data in a second latch circuit, and writes the first data into one of the first blocks in page units, and the second data into one of the first blocks in page units. The semiconductor memory writes data of at least two pages into the second block, using the first data stored in the first latch circuit and the second data stored in the second latch circuit.
Public/Granted literature
- US20190392906A1 MEMORY SYSTEM INCLUDING THE SEMICONDUCTOR MEMORY AND A CONTROLLER Public/Granted day:2019-12-26
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