- Patent Title: Vertical gate semiconductor device with steep subthreshold slope
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Application No.: US16391152Application Date: 2019-04-22
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Publication No.: US10804268B2Publication Date: 2020-10-13
- Inventor: Hung-Li Chiang , Szu-Wei Huang , Chih-Chieh Yeh , Yee-Chia Yeo
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Maschoff Brennan
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L29/06 ; H01L29/78 ; H01L23/528 ; H01L21/8238 ; H01L21/8234 ; H01L29/66

Abstract:
A semiconductor device includes a substrate, a first source/drain structure, a vertical channel layer, a gate structure, a second source/drain structure and a body epitaxial layer. The first source/drain structure is over the substrate. The vertical channel layer is over the first source/drain structure. The gate structure is on a first sidewall of the vertical channel layer. The second source/drain structure is over the vertical channel layer. The body epitaxial layer is on a second sidewall of the vertical channel layer. The body epitaxial layer and the vertical channel layer are of opposite conductivity types, and the body epitaxial layer is separated from the gate structure.
Public/Granted literature
- US20190267376A1 VERTICAL GATE SEMICONDUCTOR DEVICE WITH STEEP SUBTHRESHOLD SLOPE Public/Granted day:2019-08-29
Information query
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