The proposed Power Management Integrated Circuit (PMIC) features the option to synchronize the charge-pump of a PMIC with the system clock, and then to swap and self-oscillate and skip pulses, when the digital controls of the PMIC send a first order to the charge-pump. The clock control circuitry of the PMIC also features the option for the charge-pump to then swap and use the system clock again, when the digital controls of the PMIC send a second order to the charge-pump. The designed transition of the clock from clock sync-mode to self-oscillate, and from self-oscillate back to clock sync-mode, does not present any phase discontinuity.