Invention Grant
- Patent Title: Pad limited configurable logic device
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Application No.: US16107388Application Date: 2018-08-21
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Publication No.: US10804900B2Publication Date: 2020-10-13
- Inventor: Joao Carlos Brito , Philip Anthony Coyle
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; Charles A. Brill; Frank D. Cimino
- Main IPC: H03K19/0175
- IPC: H03K19/0175 ; H01L23/528 ; H03K19/21 ; H01L23/495 ; H01L23/00 ; H01L23/522

Abstract:
An integrated circuit provides a semiconductor die with I/O bond pads, a power bond pad, and a circuit ground pad. Each I/O bond pad is associated with an input circuit that has an input circuit output lead. Sets of digital logic functional circuitry on the die provide different digital logic functions. Each function includes logic input leads and logic output leads. Output circuits each have an output circuit in lead and an output circuit out lead. Strapping structures, such as vias, formed in the semiconductor die electrically couple input circuits to a selected set of digital logic functions and the selected set of digital logic functions to output circuit in leads. Upper level metal conductors couple output circuit out leads and selected I/O bond pads.
Public/Granted literature
- US20200067509A1 PAD LIMITED CONFIGURABLE LOGIC DEVICE Public/Granted day:2020-02-27
Information query
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