Invention Grant
- Patent Title: Method of manufacturing semiconductor package substrate and semiconductor package substrate manufactured using the same
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Application No.: US16117923Application Date: 2018-08-30
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Publication No.: US10811302B2Publication Date: 2020-10-20
- Inventor: Sung II Kang , In Seob Bae , Jea Won Kim
- Applicant: HAESUNG DS CO., LTD.
- Applicant Address: KR Changwon-si
- Assignee: HAESUNG DS CO., LTD.
- Current Assignee: HAESUNG DS CO., LTD.
- Current Assignee Address: KR Changwon-si
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@b2eece2
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L23/48 ; H01L21/768 ; H01L23/498

Abstract:
A method of manufacturing a semiconductor package substrate includes forming a trench and a post by etching an upper surface of a base substrate including a conductive material, filling the trench with a resin, removing the resin exposed to outside of the trench such that an upper surface of the post and an upper surface of the resin are at same level, forming a conductive layer on an entire area of the upper surface of the post and the upper surface of the resin, and forming a circuit wiring including an upper circuit wiring and a lower circuit wiring by simultaneously patterning the conductive layer and a lower surface of the base substrate.
Public/Granted literature
Information query
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