- Patent Title: Arithmetic processing circuit and information processing apparatus
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Application No.: US15418969Application Date: 2017-01-30
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Publication No.: US10817776B2Publication Date: 2020-10-27
- Inventor: Yasumoto Tomita
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Staas & Halsey LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@5ad725c9
- Main IPC: G06N3/04
- IPC: G06N3/04 ; G06N3/063 ; G06N3/08

Abstract:
The arithmetic processing circuit includes a first layer configured to dispose a learning neural network to compute a coefficient to be set in a recognition neural network, configured to recognize input data by using the coefficient computed on a basis of a recognition result of the recognition neural network with for the input data serving as a reference for computing the coefficient and a recognition result serving as a reference for the input data serving as the reference. The circuit further includes a second layer configured to dispose the recognition neural network to recognize the input data by the coefficient computed by the learning neural network. The circuit still further includes a third layer disposed between the first layer and the second layer, and configured to dispose a memory connected to both of the learning neural network and the recognition neural network.
Public/Granted literature
- US20170228634A1 ARITHMETIC PROCESSING CIRCUIT AND INFORMATION PROCESSING APPARATUS Public/Granted day:2017-08-10
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