Invention Grant
- Patent Title: Semiconductor structure and method for preparing the same
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Application No.: US16162729Application Date: 2018-10-17
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Publication No.: US10818508B2Publication Date: 2020-10-27
- Inventor: Yi-Jen Lo
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Main IPC: H01L21/311
- IPC: H01L21/311 ; H01L21/02

Abstract:
The present disclosure provides a method for preparing semiconductor structures. The method includes steps of providing a stack structure, wherein the stack structure comprises a nitride layer, a first layer, a stop layer, a second layer, and a first oxide layer stacked in sequence; forming a third layer on the first oxide layer; patterning the third layer to obtain a line-and-space pattern comprising a plurality of first lines and a plurality of first spaces; forming a second oxide layer on the line-and-space pattern; removing the second oxide layer on the first lines; removing the first lines to form a plurality of second spaces; and etching the first oxide layer, the second layer, and the stop layer via the second spaces to form a plurality of second lines.
Public/Granted literature
- US20200126806A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR PREPARING THE SAME Public/Granted day:2020-04-23
Information query
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