Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
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Application No.: US16188985Application Date: 2018-11-13
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Publication No.: US10818813B2Publication Date: 2020-10-27
- Inventor: Tomoo Nakayama , Shinichi Watanuki , Futoshi Komatsu , Teruhiro Kuwajima , Takashi Ogura , Hiroyuki Okuaki , Shigeaki Shimizu
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@4b921e1d
- Main IPC: H01L31/105
- IPC: H01L31/105 ; H01L31/18 ; G02B6/136 ; G02B6/122 ; H01L31/0224 ; G02B6/12

Abstract:
In order to improve the performance of a semiconductor device, a semiconductor layer EP is formed over a p-type semiconductor PR. An n-type semiconductor layer NR1 is formed over the semiconductor layer EP. The semiconductor layer PR, the semiconductor layer EP, and the semiconductor layer NR1 respectively configure part of a photoreceiver. A cap layer of a material different from that of the semiconductor layer EP is formed over the semiconductor layer EP, and a silicide layer, which is a reaction product of a metal and the material included in the cap layer, is formed within the cap layer. A plug having a barrier metal film BM1 is formed over the cap layer through the silicide layer. Here, a reaction product of the metal and the material included in the semiconductor layer NR1 is not formed within the semiconductor layer NR1.
Public/Granted literature
- US20190198703A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2019-06-27
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