- Patent Title: Internally clocked logic built-in self-test apparatuses and methods
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Application No.: US16581869Application Date: 2019-09-25
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Publication No.: US10823781B1Publication Date: 2020-11-03
- Inventor: Jan-Peter Schat
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Agent Rajeev Madnawat
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G01R31/317 ; G01R31/3177 ; G11C29/12 ; G01R31/319 ; G01R31/3187

Abstract:
Embodiments are directed to apparatuses and methods for providing a logic built-in self-test (LBIST) using an LBIST logic circuit and an auxiliary logic circuit. An example method includes using switch circuitry in an integrated circuit (IC) to change modes of operation associated with functional logic circuit, the modes of operation including an LBIST mode and an application mode, and to provide an internally generated digital clock signal to the functional logic circuitry and an LBIST logic circuit in response to the LBIST mode. The method further includes performing an LBIST using the internally generated digital clock signal, the LBIST logic circuit to test select nodes in the IC via control of the functional logic circuitry and via application of digital logic sequences provided as inputs to the I/O pad cells of the IC.
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