Invention Grant
- Patent Title: Approach for logic signal grouping and RTL generation using XML
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Application No.: US14675403Application Date: 2015-03-31
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Publication No.: US10824783B2Publication Date: 2020-11-03
- Inventor: Premshanth Theivendran , Weihuang Wang , Guy Hutchison , Gerald Schmidt
- Applicant: Xpliant
- Applicant Address: SG Singapore
- Assignee: Marvell Asia Pte, Ltd.
- Current Assignee: Marvell Asia Pte, Ltd.
- Current Assignee Address: SG Singapore
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G06F30/33 ; G06F30/30 ; G06F30/327

Abstract:
Systems and methods for generating an RTL description based on logical signal groupings are described. Logical interfaces are declared in a compressed form, and logical signal grouping is defined in a markup document. The definitions from the markup document are used by expansion scripts to populate RTL modules and encapsulate block connectivity and functionality. Multiple interfaces can be created instantly, and interface definitions for common interfaces may be easily re-defined. Default values may be assigned to module outputs for testing purposes, allowing for multi-module simulations where certain modules are shelled-out.
Public/Granted literature
- US20160292330A1 APPROACHFOR LOGIC SIGNAL GROUPING AND RTL GENERATION USING XML Public/Granted day:2016-10-06
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