Invention Grant
- Patent Title: Programming non-volatile electronic memory device with NAND architecture
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Application No.: US16226476Application Date: 2018-12-19
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Publication No.: US10825525B2Publication Date: 2020-11-03
- Inventor: Luigi Pascucci , Paolo Rolandi
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@16103315 com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@188dd3f7 com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@3f9bd2ff com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@3c861ac3
- Main IPC: G11C16/08
- IPC: G11C16/08 ; G11C16/04 ; G11C16/12 ; G11C16/24

Abstract:
A non-volatile electronic memory device is integrated on a semiconductor and is of the Flash EEPROM type with a NAND architecture including at least one memory matrix divided into physical sectors, intended as smallest erasable units, and organized in rows or word lines and columns or bit lines of memory cells. At least one row or word line of a given physical sector is electrically connected to at least one row or word line of an adjacent physical sector to form a single logic sector being erasable, with the source terminals of the corresponding cells of the pair of connected rows referring to a same selection line of a source line.
Public/Granted literature
- US20190147958A1 ELECTRONIC MEMORY DEVICE HAVING TWO PORTIONS THAT CAN BE DECOUPLED Public/Granted day:2019-05-16
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