- Patent Title: Method for producing a pillar structure in a semiconductor layer
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Application No.: US15258838Application Date: 2016-09-07
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Publication No.: US10825682B2Publication Date: 2020-11-03
- Inventor: Boon Teik Chan , Vasile Paraschiv , Efrain Altamirano Sanchez , Zheng Tao
- Applicant: IMEC VZW
- Applicant Address: BE Leuven
- Assignee: IMEC VZW
- Current Assignee: IMEC VZW
- Current Assignee Address: BE Leuven
- Agency: McDonnell Boehnen Hulbert & Berghoff LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@4bf99cb0
- Main IPC: H01L21/3065
- IPC: H01L21/3065 ; H01L21/308 ; H01L21/306 ; H01L21/02 ; H01L29/06 ; H01L29/66 ; H01L29/775 ; B82Y40/00 ; B82Y10/00 ; H01L21/265 ; H01L21/28

Abstract:
A method for producing a pillar structure in a semiconductor layer, the method including providing a structure including, on a main surface, a semiconductor layer. A patterned hard mask layer stack is provided on the semiconductor layer that includes a first layer in contact with the semiconductor layer and a second layer overlying and in contact with the first layer. The semiconductor layer is etched using the patterned hard mask layer stack as a mask. The etching includes subjecting the structure to a first plasma thereby removing a first part of the semiconductor layer and at least a part of the second layer while preserving the first layer thereby, producing a first part of the pillar structure, thereafter; and subjecting the structure to a second plasma thereby removing a second part of the semiconductor layer thereby, producing a second part of the pillar structure.
Public/Granted literature
- US20170103889A1 Method for Producing a Pillar Structure in a Semiconductor Layer Public/Granted day:2017-04-13
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