A current collapse characteristic is sufficiently suppressed. After forming a large opening (first opening) passing through both a TEOS oxide layer 42 and an oxide layer 41, a thin oxide layer (third insulating layer) 43 is formed entirely covering the layers 41 and 42 and the first opening. In the thin oxide layer 43 inside the first opening, a second opening for exposing a group-III nitride semiconductor layer 10 is provided. A gate electrode 50 is formed at a slanted portion of the first opening including the second opening. A taper angle of the first opening is smaller in the TEOS oxide layer 42 than in the oxide layer 41.