Invention Grant
- Patent Title: Semiconductor device
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Application No.: US16682931Application Date: 2019-11-13
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Publication No.: US10832788B2Publication Date: 2020-11-10
- Inventor: Yuichiro Ishii
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@76b76b7a
- Main IPC: G11C29/14
- IPC: G11C29/14 ; G11C11/419 ; G11C29/12 ; G11C11/417

Abstract:
A semiconductor device has a memory circuit and a logic circuit coupled with a memory circuit. the memory circuit included a memory array in which memory cells are arranged in a matrix, an input/output circuit for writing data to the memory cells and reading data from the memory cells, and a control circuit for generating a control signal for controlling the input/output circuit. In a test operation for testing the logic circuit, the input/output circuit receives a test data. The control circuit raises and lowers the control signal based on a rising and a falling of an external clock signal, thereby the test data is output to the logic circuit via the input/output circuit.
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