Invention Grant
- Patent Title: Semiconductor device
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Application No.: US16440614Application Date: 2019-06-13
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Publication No.: US10832922B2Publication Date: 2020-11-10
- Inventor: Seigo Mori , Masatoshi Aketa
- Applicant: ROHM CO., LTD.
- Applicant Address: JP Kyoto
- Assignee: ROHM CO., LTD.
- Current Assignee: ROHM CO., LTD.
- Current Assignee Address: JP Kyoto
- Agency: Hamre, Schumann, Mueller & Larson, P.C.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@58c4affa com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@277f9ca5 com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@30eadd28
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/52 ; H01L29/417 ; H01L29/47 ; H01L29/78 ; H01L29/872 ; H01L29/06 ; H01L29/12 ; H01L29/808 ; H01L23/495 ; H01L29/739 ; H01L29/08 ; H01L27/04 ; H01L23/00 ; H01L29/32 ; H01L29/861 ; H01L29/16 ; H01L27/06 ; H01L27/088 ; H01L29/40

Abstract:
A semiconductor device according to the present invention includes a semiconductor chip having a semiconductor layer that has a first surface on a die-bonding side, a second surface on the opposite side of the first surface, and an end surface extending in a direction crossing the first surface and the second surface, a first electrode that is formed on the first surface and has a peripheral edge at a position separated inward from the end surface, and a second electrode formed on the second surface, a conductive substrate onto which the semiconductor chip is die-bonded, a conductive spacer that has a planar area smaller than that of the first electrode and supports the semiconductor chip on the conductive substrate, and a resin package that seals at least the semiconductor chip and the conductive spacer.
Public/Granted literature
- US20190311917A1 SEMICONDUCTOR DEVICE Public/Granted day:2019-10-10
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