Invention Grant
- Patent Title: Semiconductor arrangement having continuous spacers and method of manufacturing the same
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Application No.: US16327973Application Date: 2016-12-21
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Publication No.: US10832972B2Publication Date: 2020-11-10
- Inventor: Huilong Zhu , Huicai Zhong , Yanbo Zhang
- Applicant: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
- Applicant Address: CN Beijing
- Assignee: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
- Current Assignee: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
- Current Assignee Address: CN Beijing
- Agency: Hamre, Schumann, Mueller & Larson, P.C.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@3abb7a30
- International Application: PCT/CN2016/111271 WO 20161221
- International Announcement: WO2018/090425 WO 20180524
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L29/66 ; H01L27/092 ; H01L21/8234 ; H01L29/78 ; H01L29/165
Abstract:
A semiconductor arrangement includes: a substrate; a plurality of fins formed on the substrate and extending in a first direction; a plurality of gate stacks formed on the substrate and extending in a second direction crossing the first direction and dummy gates composed of dielectric and extending in the second direction, wherein each of the gate stacks intersects at least one of the fins; and spacers formed on sidewalls of the gate stacks and sidewalls of the dummy gates, wherein spacers of at least a first one and a second one among the gate stacks and the dummy gates which are aligned in the second direction extend integrally, and at least some of the fins have ends abutting the dummy gates and substantially aligned with inner walls of corresponding ones of the spacers.
Public/Granted literature
- US20190189523A1 SEMICONDUCTOR ARRANGEMENT HAVING CONTINUOUS SPACERS AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2019-06-20
Information query
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