Invention Grant
- Patent Title: Packaging methods for semiconductor devices comprising forming trenches in separation regions between adjacent packaging substrates
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Application No.: US16727126Application Date: 2019-12-26
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Publication No.: US10832999B2Publication Date: 2020-11-10
- Inventor: Kuei-Wei Huang , Wei-Hung Lin , Chih-Wei Lin , Chun-Cheng Lin , Meng-Tse Chen , Ming-Da Cheng , Chung-Shi Liu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/56 ; H01L23/13 ; H01L23/00 ; H01L23/31
Abstract:
Packaging methods for semiconductor devices are disclosed. A method of packaging a semiconductor device includes providing a workpiece including a plurality of packaging substrates. A portion of the workpiece is removed between the plurality of packaging substrates. A die is attached to each of the plurality of packaging substrates.
Public/Granted literature
- US20200144171A1 Packaging Methods for Semiconductor Devices Public/Granted day:2020-05-07
Information query
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