Invention Grant
- Patent Title: Method for precisely aligning backside pattern to frontside pattern of a semiconductor wafer
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Application No.: US16009144Application Date: 2018-06-14
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Publication No.: US10833021B2Publication Date: 2020-11-10
- Inventor: Lei Zhang , Hongyong Xue , Jian Wang , Runtao Ning
- Applicant: Alpha and Omega Semiconductor (Cayman) Ltd.
- Applicant Address: KY Grand Cayman
- Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN) LTD.
- Current Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN) LTD.
- Current Assignee Address: KY Grand Cayman
- Agent Chen-Chi Lin
- Main IPC: H01L23/544
- IPC: H01L23/544 ; H01L21/67 ; H01L21/683 ; H01L21/304 ; H01L21/265 ; H01L21/78 ; H01L29/66

Abstract:
A method comprises the steps of providing a semiconductor device wafer; forming a first plurality of alignment marks on a first side of the semiconductor device wafer; forming a first pattern of a first conductivity type; forming a second plurality of alignment marks on a second side of the semiconductor device wafer; forming a bonded wafer by bonding a carrier wafer to the semiconductor device wafer; forming a third plurality of alignment marks on a free side of the carrier wafer; applying a grinding process; forming a plurality of device structure members; removing the carrier wafer; applying an implanting process and an annealing process; applying a metallization process and applying a singulation process.
Public/Granted literature
- US20190006285A1 METHOD FOR PRECISELY ALIGNING BACKSIDE PATTERN TO FRONTSIDE PATTERN OF A SEMICONDUCTOR WAFER Public/Granted day:2019-01-03
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