Invention Grant
- Patent Title: HVMOS reliability evaluation using bulk resistances as indices
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Application No.: US16599929Application Date: 2019-10-11
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Publication No.: US10833082B2Publication Date: 2020-11-10
- Inventor: Chia-Chung Chen , Chi-Feng Huang , Tse-Hua Lu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L21/66 ; H01L27/02 ; H01L29/06 ; G01R27/08 ; H01L29/78 ; H01L29/10 ; G01R31/50
Abstract:
A method of determining the reliability of a high-voltage PMOS (HVPMOS) device includes determining a bulk resistance of the HVPMOS device, and evaluating the reliability of the HVPMOS device based on the bulk resistance.
Public/Granted literature
- US20200043925A1 HVMOS Reliability Evaluation using Bulk Resistances as Indices Public/Granted day:2020-02-06
Information query
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