Invention Grant
- Patent Title: Semiconductor device including an MIS structure
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Application No.: US16316855Application Date: 2017-07-13
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Publication No.: US10833166B2Publication Date: 2020-11-10
- Inventor: Kenji Yamamoto , Masatoshi Aketa , Hirokazu Asahara , Takashi Nakamura , Takuji Hosoi , Heiji Watanabe , Takayoshi Shimura , Shuji Azumo , Yusaku Kashiwagi
- Applicant: ROHM CO., LTD.
- Applicant Address: JP Kyoto
- Assignee: ROHM CO., LTD.
- Current Assignee: ROHM CO., LTD.
- Current Assignee Address: JP Kyoto
- Agent Gregory M. Howison
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@5b523e46
- International Application: PCT/JP2017/025584 WO 20170713
- International Announcement: WO2018/012598 WO 20180118
- Main IPC: H01L29/51
- IPC: H01L29/51 ; H01L29/423 ; H01L29/78 ; H01L29/16 ; H01L29/20 ; H01L29/24
Abstract:
A semiconductor device has an MIS structure that includes a semiconductor layer, a gate insulating film on the semiconductor layer, and a gate electrode on the gate insulating film. The gate insulating film has a layered structure that includes a base SiO2 layer and a high-k layer on the base SiO2 layer and containing Hf. The gate electrode has a portion made of a metal material having a work function of higher than 4.6 eV, the portion being in contact with at least the high-k layer.
Public/Granted literature
- US20190355828A1 SEMICONDUCTOR APPARATUS Public/Granted day:2019-11-21
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