Invention Grant
- Patent Title: Power saving techniques for memory systems by consolidating data in data lanes of a memory bus
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Application No.: US16268634Application Date: 2019-02-06
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Publication No.: US10852809B2Publication Date: 2020-12-01
- Inventor: Jungwon Suh , Dexter Tamio Chun , Michael Hawjing Lo
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Withrow & Terranova, PLLC
- Main IPC: G06F12/06
- IPC: G06F12/06 ; G06F13/16 ; G11C7/10 ; G06F1/3234 ; G06F1/3225 ; G06F13/42

Abstract:
Power saving techniques for memory systems are disclosed. In particular, exemplary aspects of the present disclosure contemplate taking advantage of patterns that may exist within memory elements and eliminating duplicative data transfers. Specifically, if data is repetitive, instead of sending the same data repeatedly, the data may be sent only a single time with instructions that cause the data to be replicated at a receiving end to restore the data to its original repeated state.
Public/Granted literature
- US20190179399A1 POWER SAVING TECHNIQUES FOR MEMORY SYSTEMS BY CONSOLIDATING DATA IN DATA LANES OF A MEMORY BUS Public/Granted day:2019-06-13
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