An adjustable performance boot system includes a processing system and an SPI memory storing firmware volumes. The processing system retrieves, via an SPI interface at a first SPI interface performance level, a first firmware volume including a first hash value generated using a second firmware volume. The processing system then increases the SPI interface performance level, retrieves the second firmware volume via the SPI interface at the increased SPI interface performance level, generates a second hash value using that second firmware volume and, in response to it not matching the first hash value, lowers the SPI interface performance level. The processing system then retrieves the second firmware volume via the SPI interface at the decreased SPI interface performance level, generates a third hash value using that second firmware volume and, in response to it matching the first hash value, uses that second firmware volume to provide a BIOS.