Display and display system
Abstract:
A display configured to detect an error in display data without a parallel-serial conversion circuit is provided. The display includes a display area, a control unit, and a plurality of first CRC circuits. The control unit receives whole display data to control the display area. The whole display data includes a plurality of unit display data and a plurality of CRC data. The plurality of unit display data are each composed of a predetermined count of bits. A count of the plurality of CRC data is identical to the predetermined count of bits. The plurality of first CRC circuits correspond to the respective plurality of CRC data.
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