Cache operation in an apparatus supporting both physical and virtual address mapping
Abstract:
Apparatuses and methods of operating apparatus are disclosed. A processing element performs data processing operations with respect to data items stored in data storage. In a first mode the processing element references the data items using physical addresses and in a second mode the processing element references the data items using virtual addresses. A data access request handling unit receives data access requests issued by the processing element and cache stores cache lines of temporary copies of the data items retrieved from the data storage, wherein a cache line in which a data item is stored in the cache is selected in dependence on an address index portion. The data access request handling unit is responsive to a data access request for the data item from the processing element in the second mode to determine an index matching condition to be true when the address index portion of the physical address of the data item matches the address index portion of the virtual address of the data item and, when the index matching condition is false, to prevent allocation of the data item into the cache.
Information query
Patent Agency Ranking
0/0