Invention Grant
- Patent Title: Adaptive method for selecting a cache line replacement algorithm in a direct-mapped cache
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Application No.: US15181668Application Date: 2016-06-14
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Publication No.: US10853267B2Publication Date: 2020-12-01
- Inventor: Daniel J. Colglazier
- Applicant: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
- Current Assignee: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
- Current Assignee Address: SG Singapore
- Agent Jeffrey Streets
- Main IPC: G06F12/122
- IPC: G06F12/122 ; G06F12/0811 ; G06F12/128

Abstract:
A method of managing a direct-mapped cache is provided. The method includes a direct-mapped cache receiving memory references indexed to a particular cache line, using a first cache line replacement algorithm to select a main memory block as a candidate for storage in the cache line in response to each memory reference, and using a second cache line replacement algorithm to select a main memory block as a candidate for storage in the cache line in response to each memory reference. The method further includes identifying, over a plurality of most recently received memory references, which one of the algorithms has selected a main memory block that matches a next memory reference a greater number of times, and storing a block of main memory in the cache line, wherein the block of main memory stored in the cache line is the main memory block selected by the identified algorithm.
Public/Granted literature
- US20170357598A1 ADAPTIVE METHOD FOR SELECTING A CACHE LINE REPLACEMENT ALGORITHM IN A DIRECT-MAPPED CACHE Public/Granted day:2017-12-14
Information query
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