Invention Grant
- Patent Title: Data processing engine (DPE) array global mapping
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Application No.: US16399661Application Date: 2019-04-30
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Publication No.: US10853541B1Publication Date: 2020-12-01
- Inventor: Abhishek Joshi , Grigor S. Gasparyan , Aditya Chaubal , Sridhar Kirshnamurthy , Xiao Dong
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: US CA San Jose
- Agency: Patterson + Sheridan, LLP
- Main IPC: G06F30/327
- IPC: G06F30/327 ; G06F30/331 ; G06F30/34 ; G06F13/40 ; G06F15/78

Abstract:
Some examples described herein relate to global mapping of program nodes of a netlist of an application. In an example, a design system includes a processor and a memory coupled to the processor. The memory stores instruction code. The processor is configured to execute the instruction code to obtain a netlist of an application. The netlist contains program nodes and respective edges between the program nodes. The application is to be implemented on a device comprising an array of data processing engines. The processor is also configured to execute the instruction code to generate a global mapping of the program nodes based on a representation of the array of data processing engines and using an integer linear programming (ILP) algorithm; generate a detailed mapping of the program nodes based on the global mapping; and translate the detailed mapping to a file.
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