Invention Grant
- Patent Title: Anti-fuse structure circuit and forming method thereof
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Application No.: US16512869Application Date: 2019-07-16
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Publication No.: US10854544B2Publication Date: 2020-12-01
- Inventor: Junhong Feng
- Applicant: Semiconductor Manufacturing International (Shanghai) Corporation , Semiconductor Manufacturing International (Beijing) Corporation
- Applicant Address: CN Shanghai CN Beijing
- Assignee: Semiconductor Manufacturing International (Shanghai) Corporation,Semiconductor Manufacturing International (Beijing) Corporation
- Current Assignee: Semiconductor Manufacturing International (Shanghai) Corporation,Semiconductor Manufacturing International (Beijing) Corporation
- Current Assignee Address: CN Shanghai CN Beijing
- Agency: Anova Law Group, PLLC
- Priority: CN201810777344 20180716
- Main IPC: H01L23/525
- IPC: H01L23/525 ; H01L27/112

Abstract:
Anti-fuse structure circuit and method of forming an anti-fuse structure circuit are provided. A substrate is provided, and an anti-fuse is formed on the substrate by forming a first gate structure and a dielectric layer on the substrate and forming conductive plugs respectively in the dielectric layer at two sides of the first gate structure. The dielectric layer covers the first gate structure, and the conductive plugs have a width decreasing from top to bottom. A second gate structure is formed on the substrate. A top surface of the first gate structure is higher than a top surface of the second gate structure. The dielectric layer also covers the second gate structure. The conductive plugs are also located respectively in the dielectric layer at two sides of the second gate structure.
Public/Granted literature
- US20200020630A1 ANTI-FUSE STRUCTURE CIRCUIT AND FORMINFG METHOD THEREOF Public/Granted day:2020-01-16
Information query
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