Invention Grant
- Patent Title: 3D packages and methods for forming the same
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Application No.: US16716811Application Date: 2019-12-17
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Publication No.: US10854567B2Publication Date: 2020-12-01
- Inventor: Shang-Yun Hou , Sao-Ling Chiu , Ping-Kang Huang , Wen-Hsin Wei , Wen-Chih Chiou , Shin-Puu Jeng , Bruce C. S. Chou
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/00 ; H01L25/00 ; H01L21/44 ; H01L23/522 ; H01L21/304 ; H01L21/306 ; H01L21/56 ; H01L23/31

Abstract:
Embodiments of the present disclosure include a semiconductor device and methods of forming a semiconductor device. An embodiment is a method of forming a semiconductor device, the method comprising forming a conductive pad in a first substrate, forming an interconnecting structure over the conductive pad and the first substrate, the interconnecting structure comprising a plurality of metal layers disposed in a plurality of dielectric layers, bonding a die to a first side of the interconnecting structure, and etching the first substrate from a second side of the interconnecting structure, the etching exposing a portion of the conductive pad.
Public/Granted literature
- US20200126938A1 3D Packages and Methods for Forming the Same Public/Granted day:2020-04-23
Information query
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