Invention Grant
- Patent Title: Semiconductor structure along with multiple chips bonded through microbump and manufacturing method thereof
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Application No.: US16564835Application Date: 2019-09-09
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Publication No.: US10854580B2Publication Date: 2020-12-01
- Inventor: Wei-Heng Lin , Tung-Liang Shao , Chih-Hang Tung , Chen-Hua Yu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, P.C., Intellectual Property Attorneys
- Agent Anthony King
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L21/56 ; H01L23/31 ; H01L23/00 ; H01L25/00 ; H01L21/311 ; H01L23/66 ; H01L23/29

Abstract:
The present disclosure provides a semiconductor structure including a first chip having a first dielectric surface, a second chip having a second dielectric surface facing the first dielectric surface and maintaining a distance thereto, and an air gap between the second dielectric surface and the first dielectric surface. The first chip includes a plurality of first conductive lines in proximity to the first dielectric surface and parallel to each other, two adjacent first conductive lines each having a sidewall partially exposed from the first dielectric surface. The present disclosure further provides a method for manufacturing the semiconductor structure described herein.
Public/Granted literature
- US20190393197A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2019-12-26
Information query
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