Semiconductor package with improved power integrity
Abstract:
A semiconductor package includes a connection member having first and second surfaces opposing each other and including a redistribution layer, an integrated circuit chip disposed on the first surface of the connection member, and including a plurality of units, at least one capacitor on the first surface of the connection member and in proximity to the integrated circuit chip, and an encapsulant on the first surface of the connection member and encapsulating the integrated circuit chip and the at least one capacitor, wherein the plurality of units include core power units selected from the group consisting of a central processing unit, a graphics processing unit, and an artificial intelligence unit, at least one of the core power units is disposed adjacent to one edge of the integrated circuit chip, and the at least one capacitor is disposed adjacent to the one edge of the integrated circuit chip.
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