Invention Grant
- Patent Title: Semiconductor die package with more than one hanging die
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Application No.: US15776378Application Date: 2015-12-23
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Publication No.: US10854590B2Publication Date: 2020-12-01
- Inventor: Sven Albers , Klaus Reingruber , Richard Patten , Georg Seidemann , Christian Geissler
- Applicant: Intel IP Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel IP Corporation
- Current Assignee: Intel IP Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- International Application: PCT/EP2015/081130 WO 20151223
- International Announcement: WO2017/108121 WO 20170629
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H01L25/00 ; H01L25/065 ; H05K1/11

Abstract:
An apparatus is described that includes a semiconductor die package. The semiconductor die package includes a semiconductor die package substrate having a top side and a bottom side. The semiconductor die package includes I/O balls on the bottom side of the semiconductor die package substrate. The I/O balls are to mount to a planar board. The semiconductor die package includes a first semiconductor die mounted on the bottom side of the semiconductor die package substrate. The first semiconductor die is vertically located between the bottom side of the semiconductor die package substrate and a second semiconductor die that is a part of the semiconductor die package.
Public/Granted literature
- US20200176436A1 SEMICONDUCTOR DIE PACKAGE WITH MORE THAN ONE HANGING DIE Public/Granted day:2020-06-04
Information query
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