Invention Grant
- Patent Title: Semiconductor memory device
-
Application No.: US16551022Application Date: 2019-08-26
-
Publication No.: US10854620B2Publication Date: 2020-12-01
- Inventor: Takeo Mori , Takashi Terada
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2019-048690 20190315
- Main IPC: H01L27/11556
- IPC: H01L27/11556 ; H01L27/11582 ; H01L27/11524 ; G11C5/06 ; G11C16/04 ; H01L27/1157

Abstract:
According to one embodiment, a semiconductor memory device includes: first interconnect layers; second interconnect layers; a first memory pillar extending through the first interconnect layers; a second memory pillar extending through the second interconnect layers; a first film provided above the first interconnect layers, having a planar shape corresponding to the first interconnect layers and extending in the first direction; and a second film provided above the second interconnect layers, separate from the first film in the second direction, having a planar shape corresponding to the second interconnect layers and extending in the first direction. The first and second films have a compressive stress higher than a silicon oxide film.
Public/Granted literature
- US20200295020A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2020-09-17
Information query
IPC分类: