Invention Grant
- Patent Title: Method of forming transistor
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Application No.: US14475618Application Date: 2014-09-03
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Publication No.: US10854735B2Publication Date: 2020-12-01
- Inventor: Jean-Pierre Colinge , Carlos H. Diaz
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsinchu
- Agency: Jones Day
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L29/66 ; H01L29/10 ; H01L29/08 ; H01L29/786 ; B82Y10/00 ; H01L29/06 ; H01L29/775 ; H01L29/423

Abstract:
According to another embodiment, a method of forming a transistor is provided. The method includes the following operations: providing a substrate; providing a source over the substrate; providing a channel connected to the source; providing a drain connected to the channel; providing a gate insulator adjacent to the channel; providing a gate adjacent to the gate insulator; providing a first interlayer dielectric between the source and the gate; and providing a second interlayer dielectric between the drain and the gate, wherein at least one of the formation of the source, the drain, and the channel includes about 20-95 atomic percent of Sn.
Public/Granted literature
- US20160064221A1 METHOD OF FORMING TRANSISTOR Public/Granted day:2016-03-03
Information query
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