Invention Grant
- Patent Title: Stacked III-V semiconductor diode
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Application No.: US16252137Application Date: 2019-01-18
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Publication No.: US10854760B2Publication Date: 2020-12-01
- Inventor: Volker Dudek
- Applicant: 3-5 Power Electronics GmbH
- Applicant Address: DE Dresden
- Assignee: 3-5 Power Electronics GmbH
- Current Assignee: 3-5 Power Electronics GmbH
- Current Assignee Address: DE Dresden
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Priority: DE102018000395 20180118
- Main IPC: H01L29/86
- IPC: H01L29/86 ; H01L29/861 ; H01L29/36 ; H01L29/06 ; H01L29/20 ; H01L29/66

Abstract:
A stacked III-V semiconductor diode having an n− layer having a first surface, a second surface, a dopant concentration of 1012 N/cm3 to 1017 N/cm3 and a layer thickness of 50 μm to 1,000 μm, a p+ layer, which is integrally connected to the first surface and has a dopant concentration of 5·1018 N/cm3 to 5·1020 N/cm3, an n+ layer, which is integrally connected to the second surface and has a dopant concentration of at least 1019 N/cm3. The p+ layer, the n− layer and the n+ layer each having a monolithic design and each being made up of a GaAs compound. The dopant concentration of the n− layer having a first value on the first surface and a second value on the second surface, and the second value of the dopant concentration being greater than the first value at least by a factor between 1.5 and 2.5.
Public/Granted literature
- US20190221676A1 STACKED III-V SEMICONDUCTOR DIODE Public/Granted day:2019-07-18
Information query
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